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Common-mode Voltage Elimination with an Auxiliary Half-bridge Circuit for Five-level Active NPC Inverters
Quoc Anh Le, Do-Hyeon Park, and Dong-Choon Lee
Abstract This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of ?Vdc/12, 0 V, and Vdc/12. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a commonmode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.
Keyword Active neutral-point clamped inverter, common-mode voltage, high-power medium-voltage drives, space vector modulation
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