Untitled Document
Untitled Document
You may need to enable or update / install Adobe Flash Player Plug-in to display JPE e-Book in your device properly. If you use Google Chrome, please find information here
> Archives > Current Issues
JPE, Vol. 18, No. 3, May 2018
Analysis of Switching Clamped Oscillations of SiC MOSFETs
Junji Ke, Zhibin Zhao, Zongkui Xie, Changjun Wei, and Xiang Cui
Area Devices and Components
Abstract SiC MOSFETs have been used to improve system efficiency in high frequency converters due to their extremely high switching speed. However, this can result in undesirable parasitic oscillations in practical systems. In this paper, models of the key components are introduced first. Then, theoretical formulas are derived to calculate the switching oscillation frequencies after full turn-on and turn-off in clamped inductive circuits. Analysis indicates that the turn-on oscillation frequency depends on the power loop parasitic inductance and parasitic capacitances of the freewheeling diode and load inductor. On the other hand, the turn-off oscillation frequency is found to be determined by the output parasitic capacitance of the SiC MOSFET and power loop parasitic inductance. Moreover, the shifting regularity of the turn-off maximum peak voltage with a varying switching speed is investigated on the basis of time domain simulation. The distortion of the turn-on current is theoretically analyzed. Finally, experimental results verifying the above calculations and analyses are presented.
Keyword Analytical model,Current distortion,Maximum peak shifting,Oscillation frequency,Parasitic parameter,SiC MOSFET
Untitled Document